MemTest86 Technical Information

Configuring MemTest86

Main Menu
Configuration File

When MemTest86 boots, a splashscreen is displayed with a 10 second countdown timer which when expires, automatically starts the memory tests with default settings. Pressing a key or moving the mouse shall stop the timer. To configure the memory tests, select Config and the main menu is displayed. The main menu allows the user to customize the memory test settings such as the specific tests to execute, address range to test and which CPU(s) are used in testing.

The Main Menu is structured as follows:

System Info - displays the hardware details of the system
Test Selection - specifies which tests to enable, and how many passes to run
Address Range - specifies the lower and upper address memory limits to test
CPU Selection - select between Single, Parallel, Round Robin and Sequential modes
Start - start executing the memory tests
RAM Benchmark - performs benchmarking tests on RAM, and graphs the results on a chart
Settings - configure general MemTest86 settings such as language selection and screen resolution
Exit - exits MemTest86 and reboots the system

Configuration File

Memory test parameters can also be set via a configuration file _{(Pro and Site Edition only)} that is loaded on startup, without the need to manually configure the memory tests every time MemTest86 is run. This is useful especially in testing environments where memory tests need to be executed in an automated fashion without user intervention.

MemTest86 attempts to look for configuration files in the following order:

1. <SMBIOS-baseboard-product>-mt86.cfg
2. <Memory-size-in-GB>GB-mt86.cfg
3. mt86.cfg

MemTest86 shall first attempt to load a filename prefixed with the system's baseboard (eg. Surface Pro-mt86.cfg). This allows for separate configuration files for different baseboards, if running MemTest86 on multiple systems.

If no suitable file was found, MemTest86 shall attempt to load a filename prefixed with the total memory size in GB (eg. 8GB-mt86.cfg). This allows for separate configuration files depending on the size of memory.

Finally, if a suitable file is still not found, it will load the default mt86.cfg configuration file.

Basic Configuration File Format

The basic configuration file format supports a single configuration containing a set of parameter and value pairs.

Lines that start with '#' indicate a comment line. All parameters are specified as follows:

    [Parameter_name]=[Parameter_value]

A sample basic configuration file is as follows:

    # MemTest86 basic configuration file

    TSTLIST=0,1,3,5,8
    TESTCFGFILE=customtests.cfg
    NUMPASS=3
    ADDRLIMLO=0x10000000
    ADDRLIMHI=0x20000000
    CPUSEL=PARALLEL
    CPUNUM=1
    CPULIST=2,3
    MAXCPUS=32
    ECCPOLL=0
    ECCINJECT=0
    MEMCACHE=0
    LANG=ja-JP
    AUTOMODE=1
    EXITMODE=1
    MINSPDS=0
    EXACTSPDSIZE=8192
    CHECKMEMSPDSIZE=1
    SPDMANUF=Kingston
    SPDPARTNO=9905402
    SPDMATCH=1
    HAMMERPAT=0x10101010
    HAMMERMODE=SINGLE

Multiple Configuration File Format

The multiple configuration file format extends the basic format by supporting multiple configurations in a single file.

Each set of configuration data would be separated via XML style tags as specified below:

    <CONFIG="Configuration-name-1">
    …
    [Same as basic configuration format]
    …
    </CONFIG>
    <CONFIG="Configuration-name-2">
    …
    [Same as basic configuration format]
    …
    </CONFIG>
    …
    <CFGDEFAULT=1>
    <CFGTIMEOUT=0>

Up to 10 <CONFIG> blocks are supported. Configuration name strings must be no more than 80 ASCII characters and must not contain quotes (") or angle bracket (< >) characters. If more than one configuration is defined, the user shall be prompted during the MemTest86 boot phase.

The <CFGDEFAULT=X> tag is used to specify the default configuration. This can be either "LAST" or a num-ber between 1 and the number of configuration profiles. If “LAST” is specified, MemTest86 will attempt to read the last configuration number from a file named [MAC-address].lastcfg (e.g. 00-50-56-3F-5C-05.lastcfg). If no such file exists, configuration 1 (i.e. first configuration) will be used.

The <CFGTIMEOUT=X> tag is used to specify the timeout in seconds. Default is 0, which indicates no timeout. If no configuration is selected after the timeout expires, the default configuration will be loaded.

A sample multiple configuration file is as follows:

    # MemTest86 multiple configuration file

    # Configuration 1
    <CONFIG="Short test, 1 pass, core tests only">
        TSTLIST=6,7,8
        TESTCFGFILE=customtests.cfg
        NUMPASS=1
        MEMREMMB=16
        MINMEMRANGEMB=16
    </CONFIG>

    # Configuration 2
    <CONFIG="Full test, 8 passes">
        TSTLIST=0,1,2,3,4,5,6,7,8,10,11,12
        TESTCFGFILE=customtests.cfg
        NUMPASS=8
        MEMREMMB=16
    </CONFIG>

    <CFGDEFAULT=LAST>
    <CFGTIMEOUT=60>

During MemTest86 boot, the following prompt shall be displayed to the user:

    Multiple configurations detected. Please select one of the following:
        1. Short test, 1 pass, core tests only
        2. Full test, 8 passes

    Default configuration (*) shall be loaded in X seconds

List of Configuration Parameters

The following table summarizes the list of supported parameters:

Parameter	Description
TSTLIST	List of tests to execute in the test sequence. Each test is specified by a test number, separated by a comma.
TESTCFGFILE	Specifies the name of the file containing custom individual test definitions. This replaces the standard Test 0-13 individual tests used by default. See Custom test definitions for file format specifications.
NUMPASS	Number of iterations of the test sequence to execute. This must be a number greater than 0.
ADDRLIMLO	The lower limit of the address range to test. To specify a hex address, the address must begin with '0x'. Otherwise, the address shall be interpreted as a decimal address.
ADDRLIMHI	The upper limit of the address range to test. To specify a hex address, the address must begin with '0x'. Otherwise, the address shall be interpreted as a decimal address.
MEMREMMB	Minimum amount of RAM (in MB) to leave unallocated for testing. This is to allow UEFI runtime to operate properly without being memory starved. By default, this value is 16MB.
MINMEMRANGEMB	Minimum size (in MB) of contiguous memory ranges to allocate for testing. Memory ranges smaller than this size should be left unallocated as it may be used by UEFI runtime. By default, this value is 16MB.
CPUSEL	One of the following CPU selection modes: 'SINGLE' – Single-threading mode where the test is performed on a single CPU core 'PARALLEL' – Multithreading mode where the test is performed concurrently on all enabled CPU cores (default] 'RROBIN' – Single-threading mode where the CPU core is cycled after each test (ie. Round Robin) 'SEQ' – Single-threading mode where the CPU core is cycled after every 256MB memory segment (ie. Sequential)
CPUNUM	The CPU # of the logical CPU core to test in SINGLE CPU mode. This parameter only has an effect if CPUSEL is set to 'SINGLE', and is ignored otherwise. This value must be less than the value specified by MAXCPUS.
CPULIST	List of CPUs to enable for memory testing. This is useful for using only a subset of the available CPUs when performing memory testing. Each CPU is specified by a CPU number, separated by a comma. By default, all available CPUs are enabled.
MAXCPUS	The maximum number of logical CPUs cores to be enabled for testing. Only CPU numbers less than this value can be enabled. By default, this value is 256. This value must be at least 1 and no more than 512.
DISABLEMP	Specifies whether to disable multiprocessor support. This can be used as a workaround for certain UEFI firmwares that have issues running MemTest86 in multi-CPU modes. 0 - Do not disable multiprocessor support 1 - Disable multiprocessor support
ENABLEHT	Specifies whether to enable testing on logical cores. By default, memory tests are not run on logical cores. 0 – Do not enable testing on logical cores (default) 1 – Enable testing on logical cores
ECCPOLL	Specifies whether ECC errors shall be polled. 0 - Polling disabled 1 - Polling enabled (default)
ECCINJECT	Specifies whether ECC error injection shall be enabled. 0 - ECC injection disabled (default) 1 - ECC injection enabled
TSODPOLL	Specifies whether DIMM temperature sensors shall be polled. 0 - Polling disabled 1 - Polling enabled (default)
MEMCACHE	Specifies whether memory caching shall be enabled/disabled during testing. 0 – Memory caching disabled 1 – Memory caching enabled (default) 2 – Write-combining* 3 – Write-through* 4 – Write-protect* 5 – Write-back* * only available for X86 systems
PASS1FULL	Specifies whether the first pass shall run the full or reduced test. By default, the first pass shall run a reduced test (ie. fewer iterations) in order to detect the most obvious errors as soon as possible. 0 - Reduced test 1 - Full test
ADDR2CHBITS	List of bit positions of a memory address to exclusive-or (XOR) to determine which memory channel (0 or 1) is used. This is useful if you know that the memory controller maps a particular address to a channel using this decoding scheme. If this parameter is specified and MemTest86 detects a memory error, the channel number will be calculated and displayed along with the faulting address. Each bit position specified is separated by a comma. For example, ADDR2CHBITS=1,8,9 will XOR bits 1,8,9 of the address to determine the channel.
ADDR2SLBITS	List of bit positions of a memory address to exclusive-or (XOR) to determine which slot (0 or 1) is used. This is useful if you know that the memory controller maps a particular address to a slot using this decoding scheme. If this parameter is specified and MemTest86 detects a memory error, the slot number will be calculated and displayed along with the faulting address. Each bit position specified is separated by a comma. For example, ADDR2SLBITS=3,4 will XOR bits 3,4 of the address to determine the slot.
ADDR2CSBITS	List of bit positions of a memory address to exclusive-or (XOR) to determine the chip select bits (0 or 1). This is useful if you know that the memory controller maps a particular address to a CS bit using this decoding scheme. If this parameter is specified and MemTest86 detects a memory error, the CS bit will be calculated and displayed along with the faulting address. Each bit position specified is separated by a comma. For example, ADDR2CSBITS=5,11 will XOR bits 5, 11 of the address to determine the CS bit.
CHIPMAP [ .{DDR4\|DDR5} .{DIMM\|SODIMM \|CDIMM\|CSODIMM} .{num-ranks}R .x{chip-width} .{density}GB ]	Lookup table used to map each DRAM chip to a unique ID label when tracking chip-level errors (Site Edition only). The label string must be no more than 6 characters. By default, the chips shall be labeled from U0...U15. For example, `CHIPMAP=00_A,01_A,02_A,03_A,00_B,01_B,02_B,03_B` shall label the first chip as "00_A", the second chip as "01_A" and so forth according to the ordering convention defined in DIMM / Chip error decoding. There is a special case for labels that are non-negative numbers, where the string shall be prepended with "U". For example, `CHIPMAP=1,3,5,7,2,4,6,8` shall label the DRAM chips as "U1", "U3", "U5", "U7", "U2", "U4", "U6", "U8". This parameter also supports different mappings for each RAM module configuration. This is specified by optional attributes following the CHIPMAP parameter. For example, # Map for all DDR5 modules CHIPMAP.DDR5=3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18 # Map for all DDR5 CUDIMM modules CHIPMAP.DDR5.CDIMM=DAR0B0,DAR0B1,DAR0B2,DAR0B3,DBR0B0,DBR0B1,DBR0B2,DBR0B3 # Map for all DDR5 CSODIMM modules CHIPMAP.DDR5.CSODIMM=DAR0B0,DAR0B1,DAR0B2,DAR0B3,DBR0B0,DBR0B1,DBR0B2,DBR0B3 # Map for all DDR5 CAMM2 modules CHIPMAP.DDR5.CAMM2=DAR0W0,DAR0w1,DBR0w0,DBR0W1 # Map for all DDR5, SODIMM, 1-rank modules CHIPMAP.DDR5.SODIMM.1R=1,2,3,4,11,12,13,14 # Map for all DDR5, DIMM, 1-rank, x8 width, 8GB modules CHIPMAP.DDR5.DIMM.1R.x8.8GB=3,4,5,6,7,8,9,10 # Map for all DDR5, DIMM, 2-rank, x8 width, 16GB modules CHIPMAP.DDR5.DIMM.2R.x8.16GB=3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18 # Map for all DDR4 modules CHIPMAP.DDR4=1,2,3,4,6,7,8,9,10,11,12,13,14,15,16,17 # Map for all DDR4, SODIMM, 1-rank modules CHIPMAP.DDR4.SODIMM.1R=1,2,3,4,11,12,13,14 # Map for all DDR4, DIMM, 1-rank, x8 width, 8GB modules CHIPMAP.DDR4.DIMM.1R.x8.8GB=1,2,3,4,5,6,7,8 # Map for all DDR4, DIMM, 2-rank, x8 width, 16GB modules CHIPMAP.DDR4.DIMM.2R.x8.16GB=1,2,3,4,6,7,8,9,10,11,12,13,14,15,16,17 If there are multiple matches, the chip map parameter that matches the most attributes shall be applied.
LANG	Specifies one of the following languages to use: 'en-US' - English 'fr-FR' - French 'it-IT' - Italian 'es-AR' - Spanish (Latin American) 'pt-BR' - Portuguese (Brazil) 'de-DE' - German 'cs-CZ' - Czech 'pl-PL' - Polish 'ru-RU' - Russian 'ca-ES' - Catalan 'ja-JP' - Japanese 'zh-CN' - Chinese (Simplified) 'zh-HK' - Chinese (Traditional)
REPORTNUMERRS	Number of the most recent errors to display in the report file. This number must be no more than 5000.
REPORTNUMWARN	Number of the most recent warnings to display in the report file. This number must be no more than 5000. Currently, this parameter is used only for the Hammer Test (Test 13)
REPORTPREFIX	Specifies whether the report filename shall be prepended with a prefix string. 'BASEBOARDSN' - Use the SMBIOS Baseboard serial number string 'SYSINFOSN' - Use the SMBIOS System Information serial number string 'DEFAULT' - None (Pro version); SMBIOS Baseboard serial number (Site edition)
AUTOMODE	Specifies the level of user intervention to use when running the memory tests. 0 - Auto mode disabled (default). Splash screen and main menu are displayed. User is prompted to save the report file when the tests have completed. 1 - Auto mode enabled. The tests are started immediately, skipping the splash screen and main menu. Once the tests have completed, the test results are automatically saved to the report file and the system is rebooted. 2 - Auto mode w/ prompts. The tests are started immediately, skipping the splash screen and main menu. Once the tests have completed, the user is prompted to save the test results to a report file.
AUTOREPORT	If AUTOMODE is set to 1 or 2, this parameter specifies whether to automatically save test results to the report file. 0 - Do not save test results automatically 1 - Save test results automatically (default)
AUTOREPORTFMT	Specifies the format of the report when AUTOMODE is enabled and AUTOREPORT=1. 'HTML' - Save the report as an HTML file (default) 'BIN' - Save the report as a binary file
AUTOPROMPTFAIL	Specifies whether to display the test result and ask for user intervention on test failure, even when AUTOMODE is enabled. 0 - Do not prompt for user intervention on test failure (default) 1 - Prompt for user intervention on test failure
SKIPSPLASH	Specifies whether to skip the 10 second splash screen and proceed directly to the main menu. 0 - Do not skip splash screen 1 - Skip splash screen and proceed directly to the main menu
SKIPDECODE	skip the decode results screen after completion of tests 0 - Do not skip the DIMM decode screen 1 - Always skip the DIMM decode screen and proceed directly to the results summary 2 - Skip the DIMM decode screen for DDR4/LPDDR4 systems 3 - Skip the DIMM decode screen for DDR5/LPDDR5 systems
EXITMODE	Specifies the system behaviour when MemTest86 exits 0 - Reboot the system 1 - Shutdown the system 2 - Exit application and return control to UEFI BIOS 3 - Prompt the user (default)
DISABLESPD	Specifies whether to disable collection of SPD data on startup. This is a workaround to prevent throttling of memory speeds resulting in increased test times. This occurs when reading SPD data interferes with the chipset’s Closed-Loop Thermal Throttling (CLTT) mechanism. 0 – Do not disable SPD collection (default) 1 – Disable SPD collection
MINSPDS	Minimum number of RAM SPDs to be detected before allowing the memory tests to begin.
EXACTSPDS	Exact number of RAM SPDs to be detected before allowing the memory tests to begin. If this parameter is set, MINSPDS parameter is ignored. Can take an array of possible matched values: EXACTSPDS=1,2,4
EXACTSPDSIZE	Total size (in MB) of the capacity of all detected RAM SPDs to match before allowing the memory tests to begin.
CHECKMEMSPDSIZE	Specifies whether to check if the total memory capacity of all RAM SPDs detected is consistent with the system memory size before allowing the memory tests to begin. 0 - Do not check for consistency (default) 1 - Check for consistency
CHECKMEMSPEED [ .<PART_NO_STRING> ]	Specifies either an SPD profile or a minimum speed to verify against the configured memory speed (within 1%) before allowing memory tests to begin. This can be one of the following values: 'OFF’ – Disable memory speed check (default) 'JEDEC’ – Compare with the memory speed in the standard JEDEC profile ‘MAX' – Compare with the maximum memory speed of all profiles (JEDEC/XMP/EXPO) supported by the module 'XMP1' – Compare with the memory speed in XMP profile 1 'XMP2' – Compare with the memory speed in XMP profile 2 ‘EXPO1' – Compare with the memory speed in EXPO profile 1 ‘EXPO2' – Compare with the memory speed in EXPO profile 2 <MIN_SPEED> – Compare with the specified minimum memory speed (must be greater than 0) For example, `CHECKMEMSPEED=EXPO2` shall verify whether the detected memory speed is within 1% of the memory speed supported by a module’s EXPO profile 2. `CHECKMEMSPEED=5600` shall verify whether the detected memory speed is greater than 5600 MT/s. This parameter also supports an optional part number string (`<PART_NO_STRING>`) which enables the check only if there is a match with the module part number. This is specified by an optional attribute following the CHECKMEMSPEED parameter. The string may include wildcard characters () that match any character(s). For example, `CHECKMEMSPEED.C16G4SF832=MAX` would perform the max supported memory speed check if there is a module with a part number CT16G4SFS832A. If there are multiple CHECKMEMSPEED entries, only the first matching line would apply. No further checking of other CHECKMEMSPEED lines shall be performed.
SPDMANUF	Specifies a case-sensitive substring to match the JEDEC manufacturer of all detected RAM SPDs before allowing the memory tests to begin.
SPDMATCH	Specifies whether to perform matching of RAM SPD bytes against the raw values stored in the SPD.spd file before the tests start and after the tests complete. See MemTest86 User Guide for SPD.spd file specifications. The tests will not start if any of the following are satisfied: There is a mismatch with the values stored in SPD.spd No valid SPD.spd file was found No SPD modules were detected 0 - Do not perform the SPD match check (default) 1 - Perform the SPD match check
SPDREPORTBYTELO	Specifies the lower offset of the SPD byte range to include in the HTML report. Must be less than or equal to SPDREPORTBYTEHI.
SPDREPORTBYTEHI	Specifies the upper offset of the SPD byte range to include in the HTML report. Must be greater or equal to SPDREPORTBYTELO.
SPDREPORTEXTSN	Specifies whether to use the module’s extended, 18-digit serial number or standard 8-digit JEDEC serial number in reports. The extended serial number encodes additional manufacture information (including the manufacture ID, date and location). 0 – Use the standard 8-digital serial number (default) 1 – Use the extended 18-digit serial number
SPDPARTNO	Specifies a case-sensitive substring to match the part number of all detected RAM SPDs before allowing the memory tests to begin.
SAMESPDPARTNO	Specifies whether the RAM SPD Part Numbers must match before allowing the memory tests to begin.
BGCOLOR	Specifies an alternative background colour to use: 'BLACK' 'BLUE' 'GREEN' 'CYAN' 'RED' 'MAGENTA' 'BROWN' 'LIGHTGRAY
HAMMERPAT	Specifies a 32-bit data pattern to use for the row hammer test (Test 13). If this parameter is not specified, random data patterns are used.
HAMMERMODE	Specifies one of the following hammering algorithms to use for the row hammer test (Test 13): 'SINGLE' - single-sided hammer test 'DOUBLE' - double-sided hammer test (default)
HAMMERSTEP	The step size in bytes to use to determine the next row address pair to hammer. The size can be specified as a decimal or hex number. To specify a hex number, the size must begin with '0x'. This value must be greater than or equal to 64 bytes.
CONSOLEMODE	Specifies the console mode to use for the UEFI console. The UEFI firmware supports 1 or more console modes that determines the resolution of the console. All UEFI firmware supported mode '0' which is the minimum supported resolution of 80 x 25 characters. Enter a integer value to select a certain resolution, example resolutions for a 4k screen: 0 - 80 x 25 1 - 128 x 40 2 - 100 x 31 3 - 480 x 113 Note that these values determine the number of columns and rows of characters to be displayed on the screen.
CONSOLEONLY	Specifies whether to run using the console only (ie. no graphics). This allows for systems without graphics support (eg. Systems with serial console only) 0 - Normal mode (Enable graphics support) 1 - Console only mode (Do not enable graphics support)
BITFADESECS	Specifies the sleep time in seconds to use for the Bit Fade test (Test 10). By default, the sleep time is 300 seconds (5 minutes). This value must be between 180 seconds (3 minutes) and 600,000 seconds (10,000 minutes). In general, setting the sleep interval to a longer value shall test the data retention of RAM more thoroughly. To our knowledge, although there have been no comprehensive studies that determine the optimal sleep period, setting a sleep interval of 5 to 10 minutes would be a good compromise between comprehensive testing and reasonable testing time.
MAXERRCOUNT	Specifies the maximum number of errors before the tests are aborted. By default, the value is 10000.
TFTPSERVERIP	Specifies a TFTP server IP address that is different from the PXE/DHCP server IP for saving the report files
TFTPSTATUSSECS	Specifies the period in seconds to report the current test status to the TFTP server, which is displayed in the management console. By default, the period is 60 seconds (1 minute). This value must be between 10 seconds and 600 seconds (10 minutes).
TCPSERVERIP	Specifies a TCP server IP address for connection to the management console
TCPSERVERPORT	Specifies a TCP server port for connection to the management console
TCPCLIENTIP	Specifies a local TCP/IP address when DHCP is not enabled
TCPREQUESTLOCATION	Specifies the URL request path (and cloud API key) to the management console
TCPGATEWAYIP	Specifies the default gateway route IP address to allow for connections outside the local network to the management console
TCPDISABLE	Specifies whether to disable attempts to connect via TCP/IP to the management console. 0 - Do not disable TCP/IP uploading to the management console 1 - Disable TCP/IP connection to the management console (default)
DHCPDISABLE	Specifies whether to disable attempts to automatically configure a local IP address from a DHCP server on the network. Memtest86 will default to using the address specified with the TCPCLIENTIP address if DHCP is disabled. 0 - Do not disable automatic local IP address configuration. 1 - Disable automatic local address configuration (default)
PMPDISABLE	Specifies whether to disable Management Console integration via TFTP uploading of XML messages 0 - Do not disable TFTP uploading of XML messages (default) 1 - Disable TFTP uploading of XML messages
RTCSYNC	Specifies whether to set the real-time clock (RTC) by reading a file, CurrentTime.txt, from the PXE server. The format of the time is as follows: YYYY-MM-DD hh:mm:ss For example, 2020-05-22 00:53:14 0 - Do not synchronize the real-time clock with the PXE server (default) 1 - Synchronize the real-time clock with the PXE server
TRIGGERONERR	Specifies whether to enable triggering on memory error for use with logic analyzers. Before the test is started, the memory address of the structure where errors are logged is displayed on screen to allow for configuration of the logic analyzer. When memory errors are detected, the pattern 0xDEADBEEF and error details are written to the following structure: `struct ERRINFO { UINT64 Signature; // Stores 0xDEADBEEFDEADBEEF UINT64 PhysAddr; // Stores the address of the error __declspec(align(16)) __m128i Expected; // Expected pattern __declspec(align(16)) __m128i Actual; // Actual pattern __declspec(align(16)) __m128i ErrorBits; // Bits in error };` 0 - Do not trigger and log on memory errors 1 - Trigger and log memory errors to a specified location in memory
VERBOSITY	Specifies the verbosity level of the debug output 0 - Lowest verbosity level (default) 1 - Highest verbosity level
TPL	Specifies the UEFI task priority level of the MemTest86 application. UEFI tasks with higher priority level may interrupt and preempt MemTest86. 'APPLICATION' - lowest priority level (default) 'CALLBACK' - intermediate priority level 'NOTIFY' - high priority level 'HIGH_LEVEL' - highest priority level